Q9: Signed Arithmetic

Time Estimate15-30 minutes   Grade Impact0.5%   DueSep 21 @ 12pm  

Objective
Reinforce an understanding of signed arithmetic.

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Free Response Questions

  1. How does 2’s complement eliminate the ambiguity problems that exist in sign-magnitude and 1’s complement representations?

  2. Why is it possible to use the same adder circuit to perform both addition and subtraction operations, and what role does the carry-in signal play in this process?

  3. How would the behavior of an add/sub unit change if the XOR gates were removed but the carry-in was still set to 1 during subtraction? Explain what operation would actually be performed.

Multiple Choice Questions

  1. In 8-bit 2’s complement representation, what is the range of values that can be represented?

    • -127 to +127
    • -128 to +127
    • -255 to +255
    • -256 to +256
  2. To negate the number 7 (binary: 00000111) in 8-bit 2’s complement, you would:

    • Flip only the sign bit to get 10000111
    • Flip all bits to get 11111000
    • Flip all bits and add 1 to get 11111001
    • Add 1 to get 00001000
  3. In 1’s complement addition, why must we perform an “end-around carry”?

    • Because 1’s complement has two representations of zero that need to be reconciled
    • Because the carry out from the sign bit must be added back to the least significant bit to produce the correct result
    • Because 1’s complement requires an extra step to negate the subtrahend
    • Because adders cannot handle the magnitude bits correctly without this operation
  4. In the add/sub unit architecture, when the Sub control signal is set to 0, what happens to the B operand?

    • It is inverted by the XOR gates and the adder operates with Cin = 0
    • It passes through the XOR gates unchanged and the adder operates with Cin = 0
    • It is inverted by the XOR gates and the adder operates with Cin = 1
    • It passes through the XOR gates unchanged and the adder operates with Cin = 1
  5. Consider the operation 5 - 3 in 8-bit 2’s complement using an add/sub unit. After the XOR gates invert B, what is the binary value being fed to the adder?

    • 00000011 (unchanged B)
    • 11111100 (1’s complement of 3)
    • 11111101 (2’s complement of 3)
    • 00000010 (the final answer)
  6. Which representation of negative numbers is used in modern computers for integer arithmetic?

    • Sign and magnitude
    • 1’s complement
    • 2’s complement
    • All three equally
  7. If you wanted to build a circuit that performs A + B when a control signal is 0 and A - B when the control signal is 1, the most efficient design would include:

    • Two separate adders, one for addition and one for subtraction
    • XOR gates on the B input, a single adder, and the control signal connected to both the XOR gates and the carry-in
    • A multiplexer to select between positive and negative values of B
    • A dedicated subtractor circuit built from scratch using full subtractors