Q11: Circuit Synthesis

Time Estimate15-30 minutes   Grade Impact0.5%   DueSep 21 @ 12pm  

Objective
Reinforce an understanding of NAND and NOR universal logic gates.

Additional Materials & Formats
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Free Response Questions

1. What is circuit synthesis, and how does it connect a Boolean specification to a physical circuit implementation?

2. What is the difference between Sum of Products (SOP) and Product of Sums (POS) forms, and when is each used in circuit synthesis?

3. Why is Boolean algebra simplification important before implementing a circuit, and what design goals does it help achieve?

Multiple Choice Questions

4. In SOP form, the output is expressed as:

   • OR’ed maxterms that correspond to output 0 values
   • AND’ed minterms that correspond to output 1 values
   • NOR’ed literals that correspond to output 1 values
   • inverted inputs only

5. In POS form, the output is expressed as:

   • AND’ed minterms that correspond to output 1 values
   • OR’ed maxterms that correspond to output 0 values
   • NAND’ed terms that correspond to output 1 values
   • complemented literals only

6. Which theorem family is especially useful for reducing a circuit after an initial Boolean expression has been written?

   • Truth table enumeration only
   • Boolean algebra theorems such as absorption and De Morgan’s laws
   • Only the commutative law
   • Gate fan-out rules alone

7. Why are NAND and NOR gates often preferred for implementation in practice?

   • They are not universal, but they simplify truth tables
   • They are easier to realize at the transistor level and can reduce manufacturing cost
   • They eliminate the need for simplification
   • They only work for SOP expressions

8. Which of the following is a common step in the synthesis process?

   • Start with a schematic and infer the truth table by inspection only
   • Write an initial expression, simplify it, then map it to a gate family
   • Choose gates first and ignore the specification
   • Use only simulation and skip algebraic reduction

9. What is one common pitfall during circuit synthesis?

   • Applying too many simplification opportunities
   • Ignoring fan-in/fan-out limitations of gates
   • Verifying the final circuit against the original specification
   • Starting from a truth table or Boolean specification

10. Why is verification an important final step in synthesis?

    • It replaces simplification with simulation
    • It ensures the final circuit matches the original specification
    • It is only needed for POS expressions
    • It guarantees fewer literals without checking behavior